Eval Boards
Altera UP1 FPGAs
Motorola PowerPC 603e
Motorola 68HC11
Texas Instruments TMS320C3X DSK
Motorola MCF5206e Coldfire
AMD Net186
DEC SA-110 StrongARM

Altera UP1

This is the newest addition to our lab, thanks to the Altera Corporation. It has two FPGAs on it for developing complex programmable logic applications. The MAX7000 device on the left side of the board typically supports 2,500 gates for simple designs. The FLEX10K20 on the right supports 20,000 gates, and includes connections to a DB25 VGA connector, as well as a PS/2 mouse port. The system is programmable via a PC parallel port, using the included MAX+PLUS II Student Edition.

Links of Interest:

Altera Corporation
Altera University Program: Design Laboratory Package
UP1 User Guide
FLEX 10K EPLD Data Sheet
MAX7000 PLD Data Sheet
ByteBlaster Cable Data Sheet

Other Sites

Altera UP1 sample code from Georgia Tech
UP1 test code from the University of Alberta

Look here in the future for our own MAX+PLUS II project files to use with the UP1.

Please note that above files are mirrored for the convenience of SigArch members. For the latest data sheets, please visit Altera's website.

10/14/01 by Joel Jordan